Vertical cavity surface emitting laser

ABSTRACT

A vertical cavity surface emitting laser includes, a lower DBR layer; an upper DBR layer; an active layer existing between the lower DBR layer and the upper DBR layer; and a laser emitting region provided on a surface layer of the upper DBR layer, in which the upper DBR layer includes a doped first semiconductor multilayer film layer and an undoped second semiconductor multilayer film layer; an electrode provided on the upper DBR layer is formed in a region which is on an upper part of the first semiconductor multilayer film layer and is surrounded by the second semiconductor multilayer film layer; the laser emitting region is formed on a surface layer of the second semiconductor multilayer film layer; and the surface layer of the first semiconductor multilayer film layer is formed by a contact layer and the second semiconductor multilayer film layer is stacked on the contact layer.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a vertical cavity surface emittinglaser.

2. Description of the Related Art

A Vertical Cavity Surface Emitting Laser (VCSEL), which emits a laserbeam in a direction vertical to a substrate, has advantages of such asbeing easily two-dimensionally arrayed into high density.

By using the VCSEL array in which these vertical resonator type lasersare accumulated in high density, an electrophotography can form an imageof a higher definition with a higher speed.

One problem of the VCSEL is a transverse mode control, and U.S. Pat. No.6,144,682 proposes a structure (surface relief) in which a shallowrelief is formed on the top surface of a Distributed Bragg Reflector(DBR) and thereby forms a distribution of reflectance in the plane.

FIG. 6 illustrates an outline of the structure disclosed in U.S. Pat.No. 6,144,682.

In FIG. 6, a semiconductor DBR 1302 is stacked on a substrate 1301, anda resonator 1304 containing a plurality of quantum wells 1313, and asemiconductor DBR 1303 are formed thereon. A selectively oxidizablelayer 1316 having a high Al composition is formed in this semiconductorDBR 1303.

An oxidized part 1317 for confining an electric current and anunoxidized part 1318 are formed by oxidizing the selectively oxidizablelayer 1316 from a side wall of mesa structure.

A contact layer 1320 for electrically contacting an upper electrode 1321is formed on the top layer of the semiconductor DBR 1303.

A lower electrode 1322 is provided on the rear surface of the substrate1301.

A region 1323 is formed by etching one part of the contact layer 1320.Due to this etching, the reflectance of the circular region 1323 whichhas been etched becomes higher than that of an unetched part.

Thereby, the reflectance in the central part of the surface emittinglaser becomes higher than that in the peripheral part. As a result, theoscillation of a high-order transverse mode can be reduced.

In addition, Chirovsky et al., IEEE, PTL Vol. 11, 1999, pp 500 proposesan intracavity type surface emitting laser which has a dielectric DBRstacked on a semiconductor DBR and injects an electric current from thesemiconductor DBR.

SUMMARY OF THE INVENTION

In the structure of the above described U.S. Pat. No. 6,144,682, anelectric current is injected into the semiconductor DBR 1303 through thecontact layer 1320 from the upper electrode 1321.

Generally, the contact layer 1320 is doped with a high concentration ofdopant for adequately and electrically contacting with an electrodemetal, and employs a semiconductor having large hole mobility in manycases. Accordingly, the contact layer has higher electrical conductivitythan a semiconductor layer constituting the semiconductor DBR 1303underneath.

Therefore, the electric current which has flowed from the electrodemetal flows in the contact layer having high electroconductivity in atransverse direction, and then flows so as to diffuse into asemiconductor DBR 1303 side.

On the other hand, a degraded mode due to a so-called rising motion(<100>DLD) or <110>DLD from the surface of a semiconductor crystalgenerally exists in a semiconductor laser.

The degraded mode is caused by the dislocation which occurs whileinitiating from the surface of the semiconductor crystal and extends tothe inner side of the semiconductor therefrom.

The growth speed of the dislocation is accelerated by the electriccurrent.

For this reason, when the contact layer on the top surface of the VCSELis damaged, the dislocation occurs while initiating from the damagedpoint and thereby causes the degradation.

Then, because a high density of the electric current flows in thecontact layer as described above, the growth of the dislocation islargely accelerated by the electric current, and thereby a failureresults in occurring in the device.

Furthermore, in the case of the structure as illustrated in FIG. 6, theelectric current is further concentrated at a part at which the edge ofthe contact layer 1320 comes in contact with the semiconductor DBR 1303.

The surface and the side face of the semiconductor are also damaged byetching for forming the region 1323.

For this reason, in the case of the structure as illustrated in FIG. 6,the dislocation occurs on the surface of the contact layer 1320, andresults in growing further rapidly due to a higher density of theelectric current. For this reason, the device causes rapid degradationtherein and decreases its reliability.

In addition, when the dielectric DBR is stacked on the semiconductor DBRas in Chirovsky et al., IEEE, PTL Vol. 11, 1999, pp 500, the dislocationmay occur on the interface between a semiconductor and a dielectric,because the semiconductor crystal terminates on the interface betweenthe semiconductor and the dielectric, and an electric current flows inthe top semiconductor surface layer.

In addition, when the dielectric is stacked after the semiconductor hasbeen processed, an optical error factor increases and it is hard tostrictly control the film thickness and to stabilize devicecharacteristics.

The present invention has been designed with respect to the abovedescribed problem, and is directed at providing a highly-reliablevertical cavity surface emitting laser in which a region in which anelectric current exists in an upper DBR layer provided with a laseremitting region is separated from the surface of the semiconductor, andthe growth of the dislocation, which has initiated from the surface ofthe semiconductor, due to acceleration by the electric current, isreduced.

The present invention provides a vertical cavity surface emitting laserhaving the following structure.

The vertical cavity surface emitting laser includes a lower DBR layer,an upper DBR layer, an active layer existing between the lower DBR layerand the upper DBR layer; and a laser emitting region provided on asurface layer of the upper DBR layer, in which the upper DBR layerincludes a doped first semiconductor multilayer film layer and anundoped second semiconductor multilayer film layer, an electrodeprovided on the upper DBR layer is formed in a region which is on anupper part of the first semiconductor multilayer film layer and issurrounded by the second semiconductor multilayer film layer, the laseremitting region is formed on a surface layer of the second semiconductormultilayer film layer, and the surface layer of the first semiconductormultilayer film layer is formed by a contact layer and the secondsemiconductor multilayer film layer is stacked on the contact layer.

The present invention can achieve a highly-reliable vertical cavitysurface emitting laser in which a region in which an electric currentexists in an upper DBR layer provided with a laser emitting region isseparated from the surface of the semiconductor, and the growth of thedislocation, which has initiated from the surface of the semiconductor,due to acceleration by the electric current, is reduced.

Further features of the present invention will become apparent from thefollowing description of exemplary embodiments with reference to theattached drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a sectional schematic view for describing a structure of a redsurface emitting laser of the embodiment and Example 1 according to thepresent invention.

FIG. 2A is a view for describing a model for computing an electriccurrent distribution in the vicinity of the surface of the upper DBR inthe structure of FIG. 6, which is a conventional example.

FIG. 2B is a view for describing a computed result of the electriccurrent distribution in the vicinity of the surface of the upper DBR inthe structure of FIG. 6, which is the conventional example.

FIG. 3A is a view for describing a model for computing an electriccurrent distribution in the vicinity of the surface of the upper DBR ina structure according to Example 1 of the present invention.

FIG. 3B is a view for describing a result of having computed theelectric current distribution in the vicinity of the surface of theupper DBR in the structure according to Example 1 of the presentinvention.

FIG. 4 is a sectional schematic view for describing a structure of a redsurface emitting laser according to Example 2 of the present invention.

FIG. 5 is a sectional schematic view for describing a structure of a redsurface emitting laser according to Example 3 of the present invention.

FIG. 6 is a sectional schematic view for describing a structure of avertical cavity surface emitting laser in the specification of U.S. Pat.No. 6,144,682, which is the conventional example.

DESCRIPTION OF THE EMBODIMENTS

Preferred embodiments of the present invention will now be described indetail in accordance with the accompanying drawings.

Examples of a structure of the vertical cavity surface emitting laseraccording to the present invention will be described below.

The surface emitting laser according to the embodiment of the presentinvention includes at least a lower DBR layer, an upper DBR layer and anactive layer existing between the above layers, which are stacked on asubstrate, and has a laser emitting region which emits a laser beam tothe outside formed on the surface layer of the upper DBR layer.

The upper DBR layer has a structure including a doped firstsemiconductor multilayer film layer (first semiconductor DBR) and anundoped second semiconductor multilayer film layer (second semiconductorDBR).

The upper electrode is formed in a region which is the upper part of thefirst semiconductor DBR and is surrounded by the second semiconductorDBR.

Because the first semiconductor DBR, the second semiconductor DBR andthe electrode are structured as described above, a region in which anelectric current density is high overlaps little with the surface of thesemiconductor, from which dislocation may initiate.

As a result, even if a damage from which the dislocation initiatesexists on the surface of the semiconductor, such an electric current asto accelerate the growth of the dislocation does not exist in thesurface, thereby the degradation of the device can be reduced.

When the dielectric DBR is stacked on the semiconductor DBR as describedin the above Chirovsky et al., IEEE, PTL Vol. 11, 1999, pp 500, thedislocation may occur on the interface between the semiconductor and thedielectric.

In addition, when the dielectric is stacked after the semiconductor hasbeen processed, an optical error factor increases and it is hard tostrictly control the film thickness and to stabilize devicecharacteristics.

For this reason, the surface emitting laser according to the presentinvention has a structure in which a first semiconductor DBR and asecond semiconductor DBR which constitute an upper DBR are formed of acontinuous semiconductor single crystal.

In a VCSEL oscillating at a wavelength shorter than 850 nm, in which aternary mixed crystal made from AlGaAs is required to use for its DBR,GaAs is used for the contact layer, in which the GaAs is doped with ahigher concentration of dopant than that of other semiconductor layersexcept its contact layer.

Because the electrical conductivity of the GaAs layer is particularlylarger than that of the AlGaAs layer under the GaAs layer, most of theelectric current flowing in the DBR in a transverse direction flows inthe contact layer. As a result, a higher density of an electric currentexists in the surface layer of the semiconductor, which promotes thegrowth of the dislocation in the crystal, and causes the degradation ofthe device.

Accordingly, the structure according to the present embodiment can besuitably employed for the VCSEL which oscillates at a wavelength shorterthan 850 nm.

FIG. 1 is a view illustrating a layer structure according to the presentembodiment.

In the present embodiment, as is illustrated in FIG. 1, an n-DBR 102 isstacked on a GaAs substrate 101, which includes an AlAs layer 114 havingan optical thickness of ¼ of the wavelength and an AlGaAs layer 115.

On the n-DBR 102, a resonator 104 is formed, which uses AlGaInP, has anoptical thickness equal to one wavelength, and includes a plurality ofquantum wells 113 with the use of GaInP.

On the resonator 104, there is an upper DBR 105 (first semiconductorDBR) which includes an Al_(0.9)GaAs layer 130 having an opticalthickness of ¼ of the wavelength and an Al_(0.5)GaAs layer 131.

Here, the upper DBR 105 has an Al_(0.9)GaAs layer 130 and anAl_(0.5)GaAs layer 131, which are p-type-doped, and a GaAs contact layer107 which is highly doped.

Furthermore, an undoped AlGaInP layer 119 and an undoped GaAs layer 120which are formed from an insulative semiconductor having low electricalconductivity are formed on the contact layer 107.

These undoped AlGaInP layer 119 and undoped GaAs layer 120 function as aDBR, and correspond to the above described second semiconductor DBR.

On the side of the undoped AlGaInP layer 119 and the undoped GaAs layer120, an electrode 110 for electrical contact is arranged and theelectric current having flowed out from the electrode flows in thecontact layer 107 in a transverse direction.

The contact layer 107 is sandwiched between the undoped AlGaInP layer119 and the DBR 105, and accordingly is not exposed to the outside ofthe surface of the semiconductor.

For this reason, a region in which an electric current concentrates isseparated from the surface of the semiconductor, and even when thedislocation has occurred on the surface of the semiconductor, theacceleration of the growth by the electric current is prevented. As aresult, the degradation of the device can be prevented.

EXAMPLES

Examples of the present invention will be described below.

Example 1

The structure of a red surface emitting laser in a vertical cavitysurface emitting laser according to Example 1 of the present inventionwill be described below with reference to FIG. 1.

As is illustrated in FIG. 1, a DBR 102 including an n-type AlAs layer114 and an Al_(0.5)Ga_(0.5)As layer 115 is arranged on the upper part ofa GaAs substrate 101.

A resonator 104 which includes four Ga_(0.45)In_(0.55)P quantum wellsand AlGaInP layers 113 that sandwich the quantum wells and has anoptical thickness equal to one wavelength is positioned on the DBR 102.

A DBR 105 including 30 pairs of p-type Al_(0.9)Ga_(0.1)As layers 130 andAl_(0.5)Ga_(0.5)As layers 131 is positioned on the resonator 104.

An Al_(0.98)Ga_(0.02)As oxidizable layer 106 having the thickness of 30nm is inserted between the active layer of the DBR 105 and the firstlayer therefrom of the Al_(0.5)Ga_(0.5)As layer.

The oxidizable layer 106 is divided into a part 117 which has beenoxidized by water vapor and a non-oxidized part 118 which has not beenoxidized and has the diameter of 6 μm.

A contact layer 107 which has the thickness of 10 nm and is formed of ahighly-doped p-type GaAs is positioned on the DBR 105.

There is an upper electrode 110 which reliably comes in electric contactwith the contact layer 107 on the upper part of the contact layer 107.

There is a lower electrode 111 on the rear surface of the substrate,which reliably comes in electric contact with the substrate 101, underthe substrate 101.

Furthermore, there are an undoped AlGaInP layer 119 having the opticalthickness of a half of the oscillation wavelength, and an undoped GaAslayer 120 having the optical thickness of ¼ of the oscillationwavelength on the contact layer 107. A part 123 is formed in the undopedGaAs layer 120, in which the GaAs layer 120 has been removed in a regionthat has the same center axis as that of the non-oxidized part 118 andhas the diameter of 4 μm.

Next, a model for computing the electric current distribution in thevicinity of the surface of the upper DBR and the computation result willbe described with reference to FIGS. 2A and 2B and FIGS. 3A and 3B,where the structure in Example 1 and a conventional case in which thecontact layer on the top surface has been processed (FIG. 6) arecompared.

FIG. 2A illustrates the case of a structure in which a GaAs contactlayer 1320 is arranged on the top surface of a semiconductor DBR 1303and the central part has been etched as described in U.S. Pat. No.6,144,682 specification, and FIG. 3A illustrates the case of a structureof Example 1.

As is illustrated in FIG. 2B, it is understood that in the structure ofa conventional example, a high density of an electric current flows inthe GaAs contact layer 1320 of the top surface in a transversedirection, and an electric current that has reached the part 1323 whichhas been removed by etching flows in the side face of the hole.

For this reason, when the surface of the contact layer 1320 or theetched side face is damaged, the growth of the dislocation isaccelerated by the high density of the electric current flowing in thecontact layer 1320.

According to the result of having computed the electric currentdistribution in the present example illustrated in FIG. 3B, it isunderstood that the electric current does not flow in the semiconductoron the surface because the semiconductor of the upper layers than thecontact layer 107 is not doped, but flows in the contact layer 107 ofthe inner part in a transverse direction, in the present example.

Therefore, even when the surface of the semiconductor, specifically, theGaAs layer 120 or the AlGaInP layer 119 is damaged, the growth of thedislocation is not accelerated by the electric current because theelectric current does not exist in this part, and the growth of thedislocation can be made to be greatly retarded, which can improve thereliability of the VCSEL.

Next, a procedure of preparing the device in the present example will bedescribed below.

Firstly, the structure of the semiconductor layers of the abovedescribed DBR 102, resonator 104, DBR 105, high-doped p-type GaAs layer107, AlGaInP 119 and GaAs layer 120 are grown by metal organic chemicalvapor deposition or molecular beam epitaxy.

A dielectric film is formed on the wafer by using sputtering. Afterthis, a ring-shaped pattern is formed with a photoresist by usingphotolithography.

The dielectric film in a part having no photoresist thereon and theundoped GaAs layer 120 on the top surface having no photoresist thereonare removed.

Then, a dielectric film is formed again by using sputtering. Sputteringis preferably used in this procedure so as to keep the side face of theresist not being covered with the dielectric film.

Then, a mask is formed so as to cover the central part of the ring byusing a different type of photoresist.

After this, the layers are dug down to an active layer part 104 by dryetching so that a selectively oxidizable layer 106 can be exposed, whilethe ring-shaped resist is used as a mask that the peripheral partdetermines a mesa portion.

Then, an Al_(0.98)Ga_(0.02)As selectively oxidizable layer 106 isoxidized from a transverse direction in a water vapor atmosphere atapproximately 450° C. At this time, an oxidized part 117 for confiningan electric current and light, and a non-oxidized part 118, are producedby controlling the oxidation period of time.

The oxidation period of time is controlled so that the diameter of thenon-oxidized part 118 can be approximately 6 micrometers.

After this, the resist is stripped, and a dielectric film forpassivation is formed over the whole wafer with the use of plasma CVDmethod.

A resist pattern which has a ring-shaped hole for exposing the contactlayer 107 is formed on the dielectric film. Then a part in which thecontact layer 107 is exposed in a ring shape by removing the dielectricfilm, the undoped GaAs layer 120 and the undoped AlGaInP layer 118 withthe use of the resist pattern.

A p-side electrode 110 and an n-side electrode 111 are formed by using avacuum vapor deposition method and a photolithographic method.

A circular window for extracting laser light therefrom is formed in thep-side electrode 110. The electrode and the semiconductor are alloyed ina high temperature nitrogen atmosphere so that adequate electricalproperties can be obtained. Thus, the device is completed.

Example 2

The structure of the red surface emitting laser according to Example 2will be described below with reference to FIG. 4.

In the present example, a member formed of the same member as in Example1 is designated by the same reference character.

Specifically, the layer structure from the electrode 111 on the rearsurface of the GaAs substrate 101 to the contact layer 107 and thep-side electrode 110 are the same members as those in Example 1. Thedifference between the present example and Example 1 is in a structureof the second DBR positioned in the upper part of the contact layer 107,and specifically, is in the shape of the top layer and the opticalthickness of the layer positioned thereunder.

In the top layer in Example 1, in other words, the undoped GaAs layer120, the central part thereof is etched, whereas the top layer of theundoped GaAs layer in Example 2 is etched so as to form a ring shape,and a cylindrical central part 220 having the same center axis as thatof the non-oxidized part 218 is formed.

The etching pattern of the top surface layer is contrastive, but theoptical reflectance as DBR is both designed in the following way.

Specifically, the central part (the etched part 123 in Example 1 and thecylindrical top layer 220 in the present example) is designed so as tohave a higher reflectance than that of its periphery, for the purpose oftransverse mode control.

For this reason, each second layer from the top of the present exampleand Example 1 (the undoped AlGaInP layer 119 in Example 1 and an undopedAlGaInP layer 219 in the present example) has a different opticalthickness from each other.

In Example 1, the AlGaInP layer 119 has the optical thickness of a halfof the oscillation wavelength, but in the present example, the AlGaInPlayer 219 is determined so as to have the optical thickness of ¼ of theoscillation wavelength.

In the present example as well, layers in the upper part of the contactlayer 107 are undoped, and the electric current does not flow in the topsurface layers (the AlGaInP layer 219 and the GaAs layer 220).

Therefore, even if a damage from which the dislocation initiates isformed on the surface of the semiconductor by etching or other factors,the growth is not accelerated by the electric current.

As a result, the degradation of the device due to the acceleration canbe prevented, and the decrease in the reliability of the device can beprevented.

Example 3

In Example 3, a structure example different from that in the abovedescribed Examples 1 and 2 will be described with reference to FIG. 5.

In the above described Example 1, a laser emitting region which has beenformed in the central part in the in-plane direction of the surfacelayer of the second semiconductor multilayer film layer is formed in acircle by etching.

In the above described Example 2, the laser emitting region is formed ina ring shape by etching, in which the central part is left. However, ina case when there is no need to control a transverse mode, this processis not necessarily be carried out.

For instance, as is illustrated in FIG. 5, the contact layer 107 isarranged in the upper part of the first electroconductive DBR 105.Subsequently, an AlGaInP layer 319 and a GaAs layer 320 are arranged onthe upper part as an undoped DBR. Eventually, in the structure, thesurface of the device is not processed, which is different from that inExample 1 and Example 2.

The same members as those in Example 1 out of members in FIG. 5 weredesignated by the same reference characters.

In the present example, the surface of the top layer of the DBR is notsubjected to intentional processing. Accordingly, a damage due to theprocessing does not occur.

However, if an unintentional small damage was formed in the processing,a failure starting from the damage occurs, which lowers the reliability.

In contrast, in the structure of the present example, even if theunintentional small damage was formed in the processing, the dislocationis not greatly accelerated by an electric current, because the electriccurrent does not flow in any of the GaAs layer 320 of the surface andthe AlGaInP layer 319 thereunder.

As a result, the failure resulting from the damage can be reduced, andthe reliability can be enhanced.

In addition, a plurality of vertical cavity surface emitting lasers inExample 1, Example 2 and the present example may be arranged on the samesubstrate to form a laser array.

Furthermore, a vertical cavity surface emitting laser array having oneor a plurality of vertical cavity surface emitting lasers illustrated inExamples 1 to 3 arranged on a single substrate may be used in a laserbeam printer.

While the present invention has been described with reference toexemplary embodiments, it is to be understood that the invention is notlimited to the disclosed exemplary embodiments. The scope of thefollowing claims is to be accorded the broadest interpretation so as toencompass all such modifications and equivalent structures andfunctions.

This application claims the benefit of Japanese Patent Application No.2009-145550, filed on Jun. 18, 2009, which is hereby incorporated byreference herein in its entirety.

1. A vertical cavity surface emitting laser, comprising: a lower DBRlayer; an upper DBR layer; an active layer existing between the lowerDBR layer and the upper DBR layer; and a laser emitting region providedon a surface layer of the upper DBR layer, wherein the upper DBR layerincludes a doped first semiconductor multilayer film layer and anundoped second semiconductor multilayer film layer; an electrodeprovided on the upper DBR layer is formed in a region which is on anupper part of the first semiconductor multilayer film layer and issurrounded by the second semiconductor multilayer film layer; the laseremitting region is formed on a surface layer of the second semiconductormultilayer film layer; and the surface layer of the first semiconductormultilayer film layer is formed by a contact layer and the secondsemiconductor multilayer film layer is stacked on the contact layer. 2.The vertical cavity surface emitting laser according to claim 1, whereinthe first semiconductor multilayer film layer and the secondsemiconductor multilayer film layer are formed in which a crystallattice is continued from the first to second layers.
 3. The verticalcavity surface emitting laser according to claim 1, wherein the contactlayer is doped with a higher concentration of dopant than that of theother semiconductor multilayer film layers except the contact layer inthe first semiconductor multilayer film layer.
 4. The vertical cavitysurface emitting laser according to claim 1, wherein the surface layerof the second semiconductor multilayer film layer has a laser emittingregion in the central part in an in-plane direction of the surfacelayer, and the central part of the laser emitting region is formed byetching.
 5. The vertical cavity surface emitting laser according toclaim 1, wherein the surface layer of the second semiconductormultilayer film layer has a laser emitting region in the central part inan in-plane direction of the surface layer, and the laser emittingregion is formed in a ring shape by etching, in which the central partis not removed.